The present invention relates generally to bipolar transistors, and more particularly to an advanced vertical bipolar transistor structure and process.
A basic goal in bipolar circuit design is to reduce the circuit power consumption while, at the same time, increasing the speed of operation. One way to reduce power consumption is to utilize BIFET (bipolar and FET) circuits. To this end, it is highly desirable that any bipolar process be compatible with FET processing so that BIFET (bipolar and FET) chip configurations can be implemented. However, these design goals must be implemented with a transistor fabrication process that is economical.
The invention as claimed is intended to provide a bipolar transistor which offers increased speed of operation. An advantage offered by the present invention is that the need for a subcollector reach-thru contact is eliminated. A further advantage of the present invention is the overall width of the transistor is reduced by eliminating the need for the standard base contact that is normally disposed between the emitter and collector contacts. An additional advantage of the present invention is that a very narrow emitter is utilized, effectively resulting in a reduction of the problems associated with intrinsic base resistance and a minimization of emitter-base capacitance. Moreover, the process that may be used to implement the transistor design of the present invention is relatively simple and is compatible with FET processing.